A retention substrate is its coordinate.

Twelve worked examples. Same eleven axes. Each substrate’s coordinate is the tuple of its measured values. Position predicts behavior — what it retains, what it costs to retain, what survives, what fails first.

c = ⟨ τ, ρ, C, E᳗, E᳠, E᳐, A, F, R, W, V ⟩

CPU register

SILICON · FLIP-FLOP

τ₀ · ρ₂ · C₁ · Eᵂ₃ · Eᴴ₂ · Eᴿ₁ · A₁ · F₂ · R₁ · W₁ · V₁

Sub-millisecond retention, clock-tied refresh, single-word capacity, sub-femtojoule write, indexed access. The cell most other memory is benchmarked against.

L1 cache line

SILICON · SRAM

τ₁ · ρ₂ · C₂ · Eᵂ₃ · Eᴴ₁ · Eᴿ₁ · A₃ · F₁ · R₁ · W₄ · V₂

Tag-matched content-addressable access, implicit write as a side-effect of memory traffic. Sits ~6 orders above Landauer. The first cell where the access regime differs from the substrate's address line.

DRAM row

SILICON · 1T1C

τ₁ · ρ₂ · C₄ · Eᵂ₃ · Eᴴ₂ · Eᴿ₂ · A₁ · F₂ · R₁ · W₁ · V₂

Sixty-four-millisecond half-life, sustained-refresh hold cost, destructive sense-amp read. The canonical ρ ≫ 1 substrate — information persists indefinitely on a substrate that decays in milliseconds.

NAND flash page

SILICON · FLOATING GATE

τ₄ · ρ₁ · C₅ · Eᵂ₄ · Eᴴ₀ · Eᴿ₁ · A₁ · F₁ · R₁ · W₁ · V₂

Ten-year retention spec, near-zero hold cost, asymmetric write-erase-read, LDPC-protected. Pays its energy entirely at write time, then leaves the substrate alone.

Hopfield network

ALGORITHMIC · SPIN GLASS

τ — · ρ₁ · C₂ · Eᵂ₃ · Eᴴ₁ · Eᴿ₃ · A₃ · F₅ · R₂ · W₂ · V₁

Capacity ≤ 0.138 N before catastrophic first-order phase transition. Hebbian write, content-addressable recall by attractor dynamics. Interference-limited — the failure mode is not gradual.

Transformer KV cache

ALGORITHM ON GPU

τ₁ · ρ₁ · C₄ · Eᵂ₆ · Eᴴ₃ · Eᴿ₅ · A₄ · F₁ · R₂ · W₄ · V₁

Per-sequence volatile working memory at ~20 orders above Landauer per output bit. Implicit write as a forward-pass side-effect. Quadratic compute scaling with length is its capacity-failure mode.

RAG vector store

HYBRID · ANN INDEX

τ₄ · ρ₁ · C₅ · Eᵂ₄ · Eᴴ₁ · Eᴿ₆ · A₄ · F₁ · R₃ · W₁ · V₁

Externalized semantic store. Embeds and writes imperatively. Recall pays a fetch-and-recompute cost; verifiability is bolted on via citation passthrough, not native.

Working memory (Baddeley)

BIOLOGICAL · NEURAL

τ₁ · ρ₂ · C₂ · Eᵂ₂ · Eᴴ₃ · Eᴿ₀ · A₅ · F₂ · R₅ · W₂ · V₄

Twenty-second half-life without rehearsal, four-plus-or-minus-one chunks, attentional refresh, context-reinstatement access. Five orders of magnitude more efficient than the LLM working-memory equivalent.

Hippocampal episodic engram

BIOLOGICAL · CA3 + DG

τ₃ · ρ₃ · C₃ · Eᵂ₂ · Eᴴ₃ · Eᴿ₃ · A₅ · F₄ · R₅ · W₅ · V₄

Single-shot write, sparse pattern-separated capacity, context-cued recall. Reconsolidates on every retrieval. Consolidates to neocortex over sleep — the CLS handoff.

Memory B-cell population

BIOLOGICAL · CLONAL

τ₅ · ρ₃ · C₅ · Eᵂ₃ · Eᴴ₃ · Eᴿ₂ · A₃ · F₂ · R₁ · W₆ · V₅

Decade-scale information persistence on a substrate that turns over in months. Affinity selection during germinal-center reaction — the immune system's V₅ verifiability. The DRAM-refresh pattern at the cellular timescale.

Synthetic DNA archive

MOLECULAR · OLIGONUCLEOTIDE

τ₇ · ρ₁ · C₆ · Eᵂ₅ · Eᴴ₀ · Eᴿ₆ · A₁ · F₁ · R₁ · W₁ · V₂

Millennium retention at near-zero hold cost. Massive density (~2 PB/g demonstrated). Pays at synthesis and sequencing — the deepest write-recall asymmetry on the table.

Aboriginal songline

LANDSCAPE + ORAL + RITUAL

τ₇ · ρ₃ · C₆ · Eᵂ₃ · Eᴴ₅ · Eᴿ₂ · A₅ · F₂ · R₅ · W₅ · V₅

Fifty-thousand-year retention via continuous ceremonial refresh. Landscape-indexed (the loci of place itself). Multimodal cross-check — song, dance, petroglyph, ceremony, place — gives V₅ verifiability without writing.

Two substrates with nothing in common can sit at adjacent coordinates. Two with the same name (different generations) can sit far apart. The stack is what the difference looks like.

From the table to the cascade.